Timeline of Semiconductor Manufacturing
How chipmaking scaled from purified crystals in 1951 to nanosheet transistors in 2025, through planar processing, photolithography, specialized foundries and new materials.
- Category
- Engineering & Technology
- Events
- 16 events 1951 – 2025
- Generated
- by gpt-6
1951: Pfann develops zone refining
William Pfann at Bell Labs developed zone refining to concentrate impurities at one end of a crystal. The method supplied highly purified semiconductor material, addressing a basic manufacturing obstacle to producing reliable electronic devices.
https://en.wikipedia.org/wiki/Zone_melting~1955: Bell Labs patterns silicon with photolithography
Jules Andrus and Walter Bond at Bell Labs began adapting photographic techniques to pattern semiconductor surfaces; Andrus filed a patent in 1957. Transferring a repeated design through light-sensitive coatings made it possible to define small features with increasing consistency.
https://en.wikipedia.org/wiki/Photolithography1959: Hoerni develops the planar process
Jean Hoerni at Fairchild Semiconductor developed a process that left a protective oxide layer over silicon junctions. The approach improved reliability and provided a surface on which patterned connections could join multiple components.
https://en.wikipedia.org/wiki/Planar_process1960: Fairchild demonstrates a planar integrated circuit
A Fairchild Semiconductor team led by Jay Last produced a working planar integrated circuit using Robert Noyce's approach. Fabricating components and their connections together made electronic circuits suitable for repeated manufacture on silicon wafers.
https://en.wikipedia.org/wiki/Invention_of_the_integrated_circuit1963: Fairchild presents complementary transistor circuits
Frank Wanlass and Chih-Tang Sah presented complementary metal–oxide–semiconductor circuitry at Fairchild Semiconductor. Pairing opposite transistor types reduced power consumption between switching operations, making the approach increasingly useful as chip complexity grew.
https://en.wikipedia.org/wiki/CMOS1965: Moore identifies the economics of integration
Gordon Moore published an observation that the component count of economical integrated circuits had been doubling roughly annually. He later revised the interval to two years; the observation became a coordinating expectation for improving chip density and cost.
https://en.wikipedia.org/wiki/Moore's_law1968: Fairchild commercializes silicon-gate technology
Federico Faggin and colleagues at Fairchild developed a practical silicon-gate process, used in the company's 3708 chip. Self-aligned gates reduced alignment constraints and parasitic capacitance, supporting denser and faster integrated circuits.
https://en.wikipedia.org/wiki/Self-aligned_gate1971: Intel sells a single-chip microprocessor
Intel released the 4004, placing a programmable processor on one silicon chip using silicon-gate technology. Integrating processing functions reduced the component count needed for computing and made a reusable processor a commercial product.
https://en.wikipedia.org/wiki/Intel_40041973: Projection alignment improves manufacturing yield
Perkin-Elmer introduced the Micralign projection aligner. Imaging the mask onto the wafer without direct contact reduced damage and contamination, increasing the share of usable chips and lowering the cost of manufacturing them.
https://en.wikipedia.org/wiki/Micralign1987: Taiwan establishes a dedicated chip foundry
Morris Chang founded Taiwan Semiconductor Manufacturing Company (TSMC) with public and private backing. Manufacturing chips for outside designers helped separate design from fabrication, allowing firms to sell processors without financing their own factories.
https://en.wikipedia.org/wiki/TSMC1997: IBM introduces copper chip interconnects
International Business Machines (IBM) announced a manufacturable process using copper for on-chip wiring. Copper reduced electrical resistance compared with aluminum, but required new barriers and fabrication methods to keep it from contaminating silicon.
https://en.wikipedia.org/wiki/Copper_interconnects2007: Intel ships high-k metal-gate processors
Intel's Penryn processors used hafnium-based gate insulation and metal gates in a 45-nanometer manufacturing process. Replacing conventional gate materials reduced leakage as continued shrinking made extremely thin silicon-dioxide insulation difficult to use.
https://en.wikipedia.org/wiki/High-kappa_dielectric2012: Intel ships processors with three-dimensional transistors
Intel released Ivy Bridge processors manufactured with 22-nanometer tri-gate transistors. Wrapping the gate around a raised silicon fin improved control of current, helping sustain scaling as conventional planar transistors faced leakage problems.
https://en.wikipedia.org/wiki/22_nm_process2019: Extreme ultraviolet lithography enters volume production
Extreme ultraviolet lithography entered high-volume chip manufacturing after decades of development. Its shorter-wavelength light could print finer patterns, while demanding new light sources, reflective optics and contamination controls.
https://en.wikipedia.org/wiki/EUV_lithography2022: Samsung begins gate-all-around chip production
Samsung began initial production on its 3-nanometer process using gates that surrounded the transistor channels. The nanosheet architecture increased electrostatic control; the process name denoted a technology generation rather than a single measured feature size.
https://en.wikipedia.org/wiki/3_nm_process2025: TSMC brings nanosheet transistors into volume production
Taiwan Semiconductor Manufacturing Company (TSMC) reported that its N2 process entered high-volume manufacturing in the fourth quarter. The process introduced nanosheet transistors to its production platform, extending gate-all-around manufacturing to another major foundry.
https://en.wikipedia.org/wiki/2_nm_process