Timeline of the Transistor
The transistor, from Julius Lilienfeld's 1925 field-effect patent and the 1947 point-contact device at Bell Labs through junction transistors, the MOSFET and integrated circuits to FinFETs and gate-all-around nanosheet transistors in volume production in 2025.
- Category
- Engineering & Technology
- Events
- 27 events 1925 – 2025
- Generated
- by claude-opus-5-5
1925: Lilienfeld files a field-effect transistor patent
Julius Edgar Lilienfeld, a Leipzig physics professor who had moved to the United States in 1921, filed a patent application in Canada on October 22 for a device in which a voltage on one electrode controlled current through a thin copper sulfide layer, the principle of the field-effect transistor. He filed US patents from 1926 but published no papers, and no records show that he, or Oskar Heil with a similar patent filed in 1934, built a working device.
https://en.wikipedia.org/wiki/Julius_Edgar_Lilienfeld1940: Ohl discovers the p–n junction in silicon
Testing a silicon sample at Bell Labs on February 23, Russell Ohl, who was studying silicon detectors for radar, saw the current through it jump when light fell on it. He and Jack Scaff traced the effect to a boundary between regions with different impurities, which they named n-type and p-type. The p–n junction became the basis of junction transistors, most diodes and silicon solar cells.
https://en.wikipedia.org/wiki/Russell_Ohl1947: Bardeen and Brattain build the point-contact transistor
In William Shockley's solid-state physics group at Bell Labs in Murray Hill, New Jersey, John Bardeen and Walter Brattain pressed two closely spaced gold contacts onto a slab of germanium and on December 16 found that a signal at one contact controlled a larger current through the other. They showed it working as a speech amplifier on December 23. Bell Labs announced the device, named the "transistor" by John R. Pierce, on June 30, 1948.
https://en.wikipedia.org/wiki/Point-contact_transistor1948: Shockley conceives the junction transistor
Spurred partly by having been left out of the point-contact work, William Shockley conceived on January 23 a transistor made as a sandwich of n-type and p-type layers, in which injected minority carriers flowed through the bulk of the crystal rather than along its surface. He filed a patent that June and published the theory in 1949. Sturdier and easier to make than the point-contact device, it remained the main transistor type for about three decades.
https://en.wikipedia.org/wiki/Bipolar_junction_transistor1948: Mataré and Welker build the transistron in France
Herbert Mataré and Heinrich Welker, German physicists working near Paris for Compagnie des Freins et Signaux Westinghouse, obtained reproducible amplification from a germanium point-contact device by June and filed a patent on August 13, independently of Bell Labs, which had announced its transistor on June 30. Shown publicly in May 1949 as the "transistron", it was soon made by the thousands for the French telephone system.
https://en.wikipedia.org/wiki/Herbert_Matar%C3%A91951: Bell Labs announces the grown-junction transistor
Gordon Teal, who had adapted Jan Czochralski's crystal-pulling method to grow large single crystals of germanium, and Morgan Sparks began in 1950 to form n-p-n layers by dropping dopant pellets into the melt as a crystal grew. Bell Labs announced these grown-junction transistors on July 4; they outperformed the best point-contact devices and were the first practical form of William Shockley's junction transistor.
https://en.wikipedia.org/wiki/Grown-junction_transistor1952: Bell Labs licenses the transistor to industry
In April, more than 100 engineers from some 40 companies that had each paid a $25,000 patent license fee, among them General Electric and Texas Instruments, attended a nine-day Bell Labs symposium on making transistors. Western Electric, the Bell System's manufacturer, had opened the first transistor production line in Allentown, Pennsylvania, in October 1951, and a Sonotone hearing aid became the first US consumer product with a transistor.
https://en.wikipedia.org/wiki/History_of_the_transistor#Early_commercialization1953: Manchester team runs a transistor computer
At the University of Manchester, Richard Grimsdale and Douglas Webb, working under Tom Kilburn, ran a prototype computer built from 92 point-contact transistors and 550 diodes on November 16. It is generally credited as the first transistorized computer, though it still used vacuum tubes for its clock and drum circuits; fully transistorized machines such as Harwell CADET followed from 1955, and IBM announced its first transistorized mainframes in 1958.
https://en.wikipedia.org/wiki/Transistor_computer1954: Bell Labs and Texas Instruments make silicon transistors
Germanium transistors leaked current and worked only up to about 70 °C. Morris Tanenbaum made a silicon transistor at Bell Labs on January 26, but Bell did not publicize it, and on May 10 Gordon Teal, by then at Texas Instruments, announced at a conference in Dayton, Ohio, that the company was producing silicon transistors for sale. By the end of the 1950s silicon had become the industry's preferred semiconductor.
https://en.wikipedia.org/wiki/Gordon_Kidd_Teal1954: Regency launches the first commercial transistor radio
Announced on October 18 and priced at $49.95, the Regency TR-1, built by Industrial Development Engineering Associates of Indianapolis around four Texas Instruments germanium transistors, was the first commercially produced transistor radio. In Japan, Tokyo Tsushin Kogyo launched its TR-55 under the new Sony brand in 1955, followed in 1957 by the smaller TR-63.
https://en.wikipedia.org/wiki/Regency_TR-11955: Frosch and Derick discover oxide masking
At Bell Labs, hydrogen carrying dopants through a diffusion furnace briefly caught fire, and the water vapor coated silicon wafers with glassy silicon dioxide. Carl Frosch and his technician Lincoln Derick found that the oxide protected the surface and blocked dopants such as boron and phosphorus, so openings etched in it could define where impurities entered. Published in 1957, oxide masking became a foundation of planar transistors and integrated circuits.
https://en.wikipedia.org/wiki/Carl_Frosch1956: Shockley Semiconductor Laboratory opens in Mountain View
William Shockley, backed by Arnold Beckman's Beckman Instruments, opened a laboratory in Mountain View, California, to make silicon devices, and in December shared the Nobel Prize in Physics with John Bardeen and Walter Brattain "for their researches on semiconductors and their discovery of the transistor effect". In September 1957 eight of his staff, including Robert Noyce, Gordon Moore and Jean Hoerni, left to found Fairchild Semiconductor.
https://en.wikipedia.org/wiki/Shockley_Semiconductor_Laboratory1958: Kilby demonstrates a working integrated circuit
On September 12, Jack Kilby of Texas Instruments showed managers an oscillator whose transistor, resistors and capacitor were all formed in a sliver of germanium about 11 millimeters long, joined by fine gold wires. It proved an idea that Geoffrey Dummer in Britain had proposed in 1952, that a whole circuit could be made of semiconductor. Kilby received half of the 2000 Nobel Prize in Physics and is usually credited as co-inventor of the integrated circuit with Robert Noyce.
https://en.wikipedia.org/wiki/Invention_of_the_integrated_circuit1959: Fairchild devises the planar process and monolithic chip
At Fairchild Semiconductor, Jean Hoerni left the protective oxide over a transistor's junctions instead of etching it away, made a working planar transistor in March and filed a patent on May 1. Robert Noyce saw that metal lines laid over the oxide could connect many devices in one silicon chip and filed a patent on July 30. Fairchild's first working monolithic integrated circuits followed in 1960, and the planar process became the standard way to make transistors and chips.
https://en.wikipedia.org/wiki/Planar_process1959: Atalla and Kahng build the MOSFET
Building on Mohamed Atalla's finding that a thermally grown layer of silicon dioxide tamed the surface states that had defeated earlier field-effect designs, Atalla and Dawon Kahng at Bell Labs made a working metal–oxide–semiconductor field-effect transistor (MOSFET), which they presented at a conference in 1960. Bell did not pursue the slow device, but the MOSFET became what historian David Brock called the most frequently manufactured human artifact in history.
https://en.wikipedia.org/wiki/MOSFET1963: Wanlass and Sah introduce CMOS logic
In a February conference paper, Frank Wanlass and Chih-Tang Sah of Fairchild showed that pairing p-channel and n-channel transistors in complementary metal–oxide–semiconductor (CMOS) logic drew almost no power except when switching. The Radio Corporation of America (RCA) launched its CD4000 CMOS logic family in 1968, Hitachi's twin-well process of 1978 matched the speed of rival n-channel metal–oxide–semiconductor (NMOS) memory, and CMOS displaced NMOS in the 1980s.
https://en.wikipedia.org/wiki/CMOS1965: Moore predicts components per chip will keep doubling
In "Cramming more components onto integrated circuits", published in Electronics magazine on April 19, Gordon Moore, research director at Fairchild Semiconductor, noted that the number of components per chip had doubled every year and projected about 65,000 by 1975. In 1975 he slowed the forecast to a doubling every two years; dubbed "Moore's law" by Carver Mead, the trend became the industry's planning target for decades.
https://en.wikipedia.org/wiki/Moore%27s_law1967: Kahng and Sze propose the floating-gate memory transistor
Dawon Kahng and Simon Sze at Bell Labs described a metal–oxide–semiconductor transistor with an extra, fully insulated gate whose stored charge could hold a bit without power, and proposed it as a reprogrammable memory cell. Floating gates became the basis of Intel's ultraviolet-erasable programmable read-only memory (EPROM) of 1971, electrically erasable memory, and the flash memory that Fujio Masuoka devised at Toshiba in 1980, with its denser NAND (NOT-AND) form following in 1987.
https://en.wikipedia.org/wiki/Floating-gate_MOSFET1968: Faggin's silicon-gate process reaches production
A gate of polycrystalline silicon instead of aluminum could survive high temperatures and mask its own source and drain, which aligned automatically and cut stray capacitance. Robert Kerwin, Donald Klein and John Sarace at Bell Labs filed a patent on the idea in 1967; Federico Faggin and Tom Klein at Fairchild made it a practical process and shipped the first commercial silicon-gate integrated circuit, the 3708. Intel, founded that July, adopted it from the start.
https://en.wikipedia.org/wiki/Self-aligned_gate1971: Intel releases the 4004 microprocessor
Conceived for the Japanese calculator maker Busicom by Marcian Hoff and Stanley Mazor at Intel with Busicom's Masatoshi Shima, and designed by Federico Faggin in his silicon-gate process, the 4-bit 4004 put a computer's central processing unit on one chip of about 2,300 transistors. Released on November 15, it is generally cited as the first commercial single-chip microprocessor; multichip processors such as the Four-Phase AL1 came slightly earlier.
https://en.wikipedia.org/wiki/Intel_40041974: Dennard sets out the rules for shrinking transistors
In an October paper, Robert Dennard and colleagues at IBM showed how reducing transistor dimensions and operating voltages while increasing substrate doping could preserve electric-field strength and power density as switching became faster. These scaling rules guided chip design for decades. By the mid-2000s, limits on voltage reduction and leakage helped end rapid clock-speed growth and encouraged processors with multiple cores.
https://en.wikipedia.org/wiki/Dennard_scaling1988 – 1989: Japanese labs build gate-all-around and fin transistors
A Toshiba team including Hiroshi Takato and Fujio Masuoka reported a "surrounding gate transistor", a vertical silicon pillar ringed by its gate, generally cited as the first gate-all-around metal–oxide–semiconductor transistor. A year later Hitachi's Digh Hisamoto and colleagues reported the fully depleted lean-channel transistor (DELTA), built on a thin vertical silicon fin gated from both sides, an early form of the fin field-effect transistor.
https://en.wikipedia.org/wiki/Multigate_device#Gate-all-around_FET_(GAAFET)1999: Berkeley researchers develop the FinFET
Funded by the Defense Advanced Research Projects Agency from 1997, a University of California, Berkeley group led by Chenming Hu, Tsu-Jae King Liu and Jeffrey Bokor, with Hitachi's Digh Hisamoto, reported a "folded-channel" transistor in 1998 and named it the fin field-effect transistor (FinFET) in a paper the next year on devices with gates shorter than 50 nanometers. Draping the gate over a thin silicon fin kept leakage in check as transistors shrank.
https://en.wikipedia.org/wiki/Fin_field-effect_transistor2007: Intel puts high-k metal gate transistors into production
With silicon dioxide gate insulators so thin that electrons tunneled through them, Intel replaced the oxide with a thicker hafnium-based "high-k" dielectric and the polysilicon gate with metal in its 45-nanometer process; its first such processors shipped in November, and IBM announced similar plans. Intel said the change cut gate leakage more than tenfold, and Gordon Moore called it the biggest change in transistor technology since polysilicon gates in the late 1960s.
https://en.wikipedia.org/wiki/High-kappa_dielectric2011: Intel announces tri-gate transistors for 22 nanometers
On May 4, Intel described "tri-gate" transistors, silicon fins with the gate on three sides, for its 22-nanometer process, and it began selling Ivy Bridge processors built with them in April 2012. The major foundries, including Taiwan Semiconductor Manufacturing Company (TSMC), Samsung and GlobalFoundries, adopted fin field-effect transistors (FinFETs) at their 14- and 16-nanometer nodes from 2014; fins became the dominant design at the 14-, 10- and 7-nanometer nodes.
https://en.wikipedia.org/wiki/Multigate_device#Tri-gate_transistor2022: Samsung starts producing gate-all-around transistors
On June 30, Samsung Electronics announced initial production at its 3-nanometer node with Multi-Bridge-Channel field-effect transistors (MBCFETs), gate-all-around devices whose gate surrounds stacked horizontal silicon nanosheets, the first such transistors in commercial production. Taiwan Semiconductor Manufacturing Company (TSMC) kept fin-shaped transistors for its own 3-nanometer process. Node names such as "3 nm" no longer specify a particular transistor dimension.
https://en.wikipedia.org/wiki/3_nm_process2025: TSMC and Intel begin mass-producing nanosheet transistors
Taiwan Semiconductor Manufacturing Company (TSMC) said its N2 process, its first with nanosheet transistors, entered volume production in the fourth quarter as planned. Intel's 18A process paired its RibbonFET gate-all-around transistors with PowerVia, which moves power wiring to the back of the chip; laptops with the first 18A processors, made at Fab 52 in Chandler, Arizona, became available on January 27, 2026.
https://en.wikipedia.org/wiki/2_nm_process